1. Field of the Invention
The present invention relates generally to methods for fabricating silicon substrate wafers employed for fabricating semiconductor integrated circuit microelectronic fabrications. More particularly, the present invention relates to methods for fabricating, with attenuated defects, silicon substrate wafers employed for fabricating semiconductor integrated circuit microelectronic fabrications.
2. Description of the Related Art
Semiconductor integrated circuit microelectronic fabrications are formed from semiconductor substrate wafers within and upon which are formed semiconductor devices, and over which are formed patterned conductor layers which are separated by dielectric layers.
As semiconductor integrated circuit microelectronic fabrication integration levels have increased and semiconductor device dimensions have decreased, it has become increasingly important in the art of semiconductor integrated circuit microelectronic fabrication to provide, with continually decreasing defect levels, semiconductor substrate wafers, and in particular silicon semiconductor substrate wafers, from which are formed semiconductor integrated circuit microelectronic fabrications. Continually decreasing defect levels are desirable within semiconductor substrate wafers from which are formed semiconductor integrated circuit microelectronic fabrications insofar as defect concentrations and defect sizes within semiconductor substrate wafers, even if relatively constant when fabricating semiconductor integrated circuit microelectronic fabrications, will often have a pronounced detrimental effect under circumstances where semiconductor device dimensions decrease in size when fabricating semiconductor integrated circuit microelectronic fabrications.
While semiconductor substrate wafers having decreased defect levels are thus clearly desirable in the art of semiconductor integrated circuit microelectronic fabrication and often essential in the art of semiconductor integrated circuit microelectronic fabrication, semiconductor substrate wafers having decreased defect levels are nonetheless not always readily obtainable in the art of semiconductor integrated circuit microelectronic fabrication. In that regard, semiconductor substrate wafers having decreased defect levels are not always readily obtainable in the art of semiconductor integrated circuit microelectronic fabrication insofar as there often exists various competing types of defects and various competing sources of defects within semiconductor substrate wafers which may often be attenuated with only a limited number of methods within the art of semiconductor integrated circuit microelectronic fabrication.
It is thus desirable in the art of semiconductor integrated circuit microelectronic fabrication to provide methods and materials through which there may be attenuated defects within semiconductor substrate wafers when fabricating semiconductor substrate wafers.
It is towards the foregoing object that the present invention is directed.
Various methods and materials have been disclosed in the art of semiconductor integrated circuit microelectronic fabrication for providing silicon semiconductor substrate wafers with desirable properties in the art of semiconductor integrated circuit microelectronic fabrication.
Included among the methods and materials, but not limited among the methods and materials, are methods and materials disclosed within: (1) Wijaranakula, in xe2x80x9cCharacterization of Crystal Originated Defects in Czochralski Silicon Using Nonagitated Secco Etching,xe2x80x9d J. Electrochem. Soc., Vol. 141(11), November 1994, pp. 3273-77 (a chemical etch method employing a dilute aqueous potassium dichromate and hydrofluoric etchant material for highlighting defects, and in particular crystal originated particle (COP) defects, within silicon semiconductor substrate wafers employed for fabricating semiconductor integrated circuit microelectronic fabrications; (2) Graf et al., in xe2x80x9cImprovement of Czochralski Silicon Wafers by High-Temperature Annealing,xe2x80x9d J. Electrochem. Soc., Vol. 142(9), Sept. 1995, pp. 3189-92 (a series of high temperature hydrogen, argon and oxygen annealing methods for attenuating defects, such as crystal originated particle (COP) defects, within silicon semiconductor substrate wafers employed for fabricating semiconductor integrated circuit microelectronic fabrications); (3) Tamatsuka et al., in xe2x80x9cHigh Performance Silicon Wafer With Wide Grown-In Void Free Zone and High Density Internal Gettering Site Achieved via Rapid Crystal Growth With Nitrogen Doping and High Temperature Hydrogen and/or Argon Annealing,xe2x80x9d source unknown (a rapid crystal growth, nitrogen doping and hydrogen and/or argon annealing method for attenuating defects, such as crystal originated particle (COP) defects, within silicon semiconductor substrate wafers employed for fabricating semiconductor integrated circuit microelectronic fabrications); (4) Banan et al., in U.S. Pat. No. 5,753,567, (a halogen plasma treatment method for cleaning metallic contaminants from the surfaces of polycrystalline silicon powders employed for fabricating silicon semiconductor substrate wafers in turn employed for fabricating semiconductor integrated circuit microelectronic fabrications); and (5) Sato et al., in U.S. Pat. No. 6,180,497 (a fabrication method for fabricating a porous and terraced topographic silicon semiconductor substrate wafer employed within a silicon on insulator (SOI) silicon semiconductor substrate wafer employed for fabricating semiconductor integrated circuit microelectronic fabrications).
Desirable in the art of semiconductor integrated circuit microelectronic fabrication are additional methods and materials which may be employed for providing, with attenuated defects, silicon semiconductor substrate wafers which may be employed for fabricating semiconductor integrated circuit microelectronic fabrications.
It is towards the foregoing object that the present invention is directed.
A first object of the present invention is to provide a method for fabricating a silicon semiconductor substrate wafer which may be employed for fabricating a semiconductor integrated circuit microelectronic fabrication.
A second object of the present invention is to provide a method for fabricating the silicon semiconductor substrate wafer in accord with the first object of the present invention, wherein the silicon semiconductor substrate wafer is fabricated with attenuated defects.
A third object of the present invention is to provide a method for fabricating the silicon semiconductor substrate wafer in accord with the first object of the present invention and the second object of the present invention, wherein the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a method for fabricating a silicon substrate wafer.
To practice the method of the present invention, there is first provided a crucible having contained therein a silicon melt. There is then pulled from the silicon melt a silicon ingot while employing a Czochralski method. There is then sliced from the silicon ingot a silicon substrate wafer. Within the method of the present invention, at least one of: (1) the silicon melt has introduced therein a halogen getter material from an extrinsic source; and (2) the silicon substrate wafer is further treated with a plasma.
The present invention provides a method for fabricating a silicon semiconductor substrate wafer which may be employed for fabricating a semiconductor integrated circuit microelectronic fabrication, wherein the silicon semiconductor substrate wafer is fabricated with attenuated defects.
The present invention realizes the foregoing object by fabricating a silicon substrate wafer, such as a silicon semiconductor substrate wafer, while employing a Czochralski method, wherein at least one of: (1) a silicon melt from which is pulled a silicon ingot has introduced therein a halogen getter material from an extrinsic source; and (2) a silicon substrate wafer which is sliced from the silicon ingot is further treated with a plasma.
The method of the present invention is readily commercially implemented.
As will be illustrated in greater detail within the context of the Description of the Preferred Embodiment, as set forth below, a silicon semiconductor substrate wafer fabricated in accord with the present invention may be fabricated employing methods and materials as are generally known in the art of semiconductor integrated circuit microelectronic fabrication, but employed within the context of specific materials limitations and specific process limitations which provide the present invention. Since it is thus at least in part a series of specific materials limitations and specific process limitations which provides at least in part the present invention, rather than the existence of methods and materials which provides the present invention, the method of the present invention is readily commercially implemented.